Terasic - DE0-Nano-SoC development kit features high-speed DDR3 memory and more (P0286) | Heisener Electronics
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Terasic - DE0-Nano-SoC development kit features high-speed DDR3 memory and more (P0286)

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Post-datum: 2015-09-22
The Terasic DE0-Nano-SoC development kit is a powerful hardware design platform built around Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core ARM Cortex-A9 embedded core with industry-leading programmable logic. It can be used in conjunction with high-performance, low-power processor systems using powerful reconfiguration capabilities. Altera's SoC integrates an ARM-based hard processor system (HPS), which consists of a processor, peripherals, and memory interface that uses a high-bandwidth interconnect backbone to seamlessly bind the FPGA architecture. The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory, analog-to-digital functions, Ethernet network, etc., providing many application opportunities. The DE0-Nano-SoC development kit contains all the tools needed for use. The company said the board will work with computers running Microsoft Windows XP or higher.